Si DRIE

The key building block in MEMS fabrication is deep silicon (Si) etching; with processes including high rate etching, high aspect ratio, through-wafer etches and etching to buried oxide layers, including SOI wafers.

A patented dual plasma source arrangement produces uniform plasma density in the chamber which improves profile/depth uniformity and controls profile tilting.

A patented thick dielectric electrostatic chuck (ESC) allows wafer-less plasma cleans for best process stability and clamping through carriers, such as glass.

The industry’s highest productivity metrics can be achieved on SPTS’ DRIE equipment, with high uptimes and mean time between clean (MTBC).

 

Benefits of SPTS Si DRIE

  • Highest etch rate in MEMS mass production - high throughput
  • Highest aspect ratio (AR) in mass production
  • Control of scalloping
  • Exceptional tilt control from dual plasma source for next generation MEMS sensor devices
  • Patented bias pulsing for notch control at oxide interfaces
  • Best in class uniformity from dual source
  • Claritas™ - the industry’s only end-point detection system for ultra-low open area and high process pressures - for process control and excellent wafer-to-wafer uniformity.

 

Si MEMS structure
     

Claritas End-point detection on 1% open area

Claritas™ end-point detection on 1% open TSVs

 

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