SPTS IN THE NEWS ARCHIVE

2015 Industry Outlook: SPTS predicts it's 3D Etch, PVD, and CVD will reach HVM

In June 2014, SPTS co-produced a webinar with Ron Huemoeller of Amkor, titled “2.5D and 3D Packaging at the Tipping Point.” We forecasted that significant product announcements would be made over the next 18 months and we were right; sk Hynix, Samsung and Micron all announced readiness for their 3D stacked memory packages, and at the end of the year, AMD started risk production on a high bandwidth 2.5D interposer package, featuring a graphic chip next to four High Bandwidth Memory (HBM) stacks from sk Hynix. These products offer 3 to 4 times higher bandwidth without exceeding power budgets, and will ramp through 2015. This is a watershed moment for those of us who have invested heavily in 3D technology; once production starts, costs will drop and others will follow into HVM.

2014 also saw TSV technology expand into other applications; multiple image sensor companies started 300mm 3D wafer level packaging (3D WLP) lines, and MEMS devices began to transition away from wire bonding into via last TSV to stay on their package size reduction roadmaps. All this confirms what SPTS and the fabs have been saying for some time – TSV technology yields well and is production ready. 2015 will be the year our 3D etch, CVD and PVD technology moves into high volume manufacturing.

However, the applications that have embraced (interposer) and 3D are a small subset of the market, and use them because their performance or form factor objectives cannot be achieved by traditional packaging.The goal now is to expand high performance packaging into volume markets, and for that, costs have to fall. 2014 saw an emerging trend of embedding die on mold based substrates, avoiding costly through silicon vias. TSMC, Amkor, SPIL plus others have made product announcements on these high-density wafer-level fan-out (WLFO) formats, claiming significant cost reductions over TSV-containing packages. This will be a large area of focus for SPTS in 2015; embedded wafer-level ball grid array (eWLB), the first WLFO platform, was developed by Infineon on our PVD systems and we have introduced a number of features designed to meet the challenges of mold substrates such as contamination & wafer bow. We continue to refine those benefits as packaging companies develop their own WLFO concepts. ~ D. B.

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