Webinars

SPTS Webinars

Date

Title & Description

28th Sep 2017

Bumps with better contact; Latest Advances in PVD UBM/RDL Metallization

With the ever-present drive to create smaller electronic devices that maintain or surpass the performance of existing devices, manufacturers are looking to the next generation of advanced packaging schemes to achieve this improvement as traditional scaling begins to reach its physical limits.  Many packaging solutions introduce organic materials in advanced packaging schemes (such as PI or PBO dielectric passivation, epoxy mold compound for FOWLP, or adhesives for bonded wafers with 2.5D and 3D TSV) which have the potential to contaminate under bump metal (UBM) or redistribution layers (RDL) resulting in an undesirable increase in electrical contact resistance (Rc). With the reduction of UBM/RDL via dimensions in line with device shrinks, contamination effects become more critical and the pressure to maintain and even reduce Rc levels during device operation has been at the forefront of PVD equipment supplier engineering challenges in recent years.

This webinar will discuss in detail the mechanisms behind Rc increase, with a focus on degas and pre-clean stages of the UBM/RDL process flow.  A comparison of techniques used in production today to manage the issue will be presented.  Finally, a novel approach to produce low and stable Rc performance in volume production for current and next generation device packaging schemes will be introduced.

To view the recorded session, click here. 

 

30th Aug 2017

Powering on with High Productivity SiC and GaN Etch

Infra-structure projects requiring power control and regulation (such as wind energy, electric vehicles and lighting control) as well as RF proliferation (for high performance cellular base stations) are driving the demand for higher voltage and higher frequency devices based on GaN and/or SiC.

IHS has predicted that the SiC power device market will grow to $3B by 2025. Key to the formation of many GaN or SiC device structures is etching of the SiC itself.

This webinar will focus on SPTS’s approach to SiC etching, based on the unique Synapse™ process module with a plasma density that is ten times higher than standard ICP reactors. We will give examples of deep SiC back-side via etching for GaN devices as well as shallower trench structures on the front-side of SiC wafers. Our focus will be on high productivity process solutions consistent with the increasing demand for volume production of these device types.

To view the recorded session, click here. 

 

15th Dec 2016

AlN for Next Generation PiezoMEMS

Designers are starting to use Aluminum Nitride (AlN) and other piezo materials by physical vapor deposition (PVD) for a new range of high performance MEMS devices such as microphones, finger print sensors, energy harvesters, speakers and Si oscillators. This webinar examines how the success of deposition of AlN by PVD for the established RF BAW market has provided a roadmap to develop these new MEMS based applications. You will hear how new material requirements and film properties are being met with SPTS’s latest Sigma fxP PVD hardware and technologies.

Topics covered:

  • AlN markets, trends and drivers
  • Requirements and process flow for PiezoMEMs applications
  • SPTS Sigma fxP PVD technologies for AlN deposition in volume production

It's not too late to register to view the recorded session, click here.

If you registered but were unable to make the Webinar, please click here to view the recorded session.

 

14th Sept 2016

Plasma Dicing for Next Generation Ultra Small and Ultra Thin Die

Continuing our webinar series on Advanced Packaging applications we are pleased to announce our next webinar on Plasma Dicing on Wednesday 14th September, which we are proud to be co-hosting with Amandine Pizzagalli, Technology & Market Analyst at Yole Développement.

During this webinar, Yole Développement will give its vision and an overview of the key dicing technologies across MEMS devices, power devices, CMOS image sensors, and RFID devices, highlighting its major findings on the evolution and trends of the dicing technologies.

SPTS will be presenting the latest data illustrating how processing routes affect die strength, share experiences with different types of tapes and other die features such as solder balls. We will share details of the latest equipment which is now available for plasma dicing wafers up to 300mm (on 400mm tape frames) for full production applications.

To view this webinar click here

13th Oct 2015 

FOWLP Goes Mainstream

Fan-Out Wafer Level Packaging (FOWLP) is the fastest growing format in the advanced packaging sector.  Just this month, Yole revised its projections to show a 32% CAGR through 2020 as TSMC enters the fray with its InFO product. InFO is just one of a number of different FOWLP formats that are being proposed to meet the industry goals of high density performance at low cost.

All the FOWLP formats embed die in an epoxy mold compound (EMC), and build dense I/O connections outside the periphery of the die, hence the name “Fan-Out”.  The use of EMC presents significant challenges to the makers of RDL and UBM deposition equipment.

During this webinar, hear why FOWLP is receiving such attention, and learn how SPTS deals with the challenges of depositing UBM/RDL metal on EMC substrates and explain why SPTS is the leading PVD supplier to this important market. 

Did you miss this webinar?

This webinar was presented live on Tuesday 13th October 2015. To receive a link to the recording, email enquiries@spts.com.

13th May 2015

Plasma Dicing - Integrating for Production 

The key to successful introduction of plasma dicing is how to integrate this front-end technology into the back-end process flow. This webinar shows how various schemes can be used to allow plasma dicing to enter the process flow as seamlessly as possible, whilst also introducing SPTS’s Mosaic production plasma dicing system and its range of capabilities.

To view this webinar click here

   

 

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