SPTS IN THE NEWS ARCHIVE

Solid State Technology: "IFTLE 193 SEMI Singapore Part 2: SPTS and STATSChipPAC" - Phil Garrou

Article first published by Solid State Technology / IFTLE 193, May 2014

Read the full article at: "IFTLE 193 SEMI Singapore Part 2: SPTS and STATSChipPAC"

 

By Dr. Phil Garrou

At the recent 2.5/3DIC Forum at SEMI Singapore Dr. Surya Bhattacharya, Director of Industry Development (TSV) at, A*STAR Institute of Microelectronics chaired the day long session looking at the state of TSV technology. Let’s take a look at some of these presentations.

SPTS

SPTS updated attendees on their endpoint controlled “via reveal” etch process. As we know, via reveal involves the following process sequence:

SPTS 1

The SPTS Rapier module has their “ReViaTM” in-situ end-point detection technology which they claim increases throughput and yield.

SPTS 2

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