Bumps with better contact; latest Advances in PVD UBM/RDL Metallization
With the ever-present drive to create smaller electronic devices that maintain or surpass the performance of existing devices, manufacturers are looking to the next generation of advanced packaging schemes to achieve this improvement as traditional scaling begins to reach its physical limits. Many packaging solutions introduce organic materials in advanced packaging schemes (such as PI or PBO dielectric passivation, epoxy mold compound for FOWLP, or adhesives for bonded wafers with 2.5D and 3D TSV) which have the potential to contaminate under bump metal (UBM) or redistribution layers (RDL) resulting in an undesirable increase in electrical contact resistance (Rc). With the reduction of UBM/RDL via dimensions in line with device shrinks, contamination effects become more critical and the pressure to maintain and even reduce Rc levels during device operation has been at the forefront of PVD equipment supplier engineering challenges in recent years.
This webinar will discuss in detail the mechanisms behind Rc increase, with a focus on degas and pre-clean stages of the UBM/RDL process flow. A comparison of techniques used in production today to manage the issue will be presented. Finally, a novel approach to produce low and stable Rc performance in volume production for current and next generation device packaging schemes will be introduced.
Presenter: Nick Knight, PVD Product Manager
Nick Knight has more than two decades of experience in the semiconductor capital equipment and related industries. He first joined Electrotech in 1995 as an Equipment Engineer working with PVD products, working in Asia, Europe and US. In 2001, he joined STS in the role of Regional Service Manager for Asia, and in 2003 joined the Marketing team as an Etch Product Marketing Manager. In 2010, following the formation of SPTS Technologies, Mr. Knight went back to PVD product lines as a Product Manager.