FOWLP - PVD Processes
Download this datasheet describing how fan-out wafer-level packaging (FOWLP) technology provides higher integration levels and a greater number of external contacts.
DownloadWith the adoption of organic passivation and new substrate materials the technical challenges for UBM/RDL deposition are in the areas of pre-treatment. This is becoming yet more challenging as line/space widths and critical dimensions reduce to improve device performance and reduce form factor of the die.
Using patented high vacuum degas and low damage pre-clean technology, the Sigma® fxP produces low and stable Rc values whilst delivering up to a 2x throughput advantage over other PVD systems.
SPTS' Advanced Hi-Fill ionized PVD source delivers world class step coverage for PVD Cu barrier/seed in TSVs with aspect ratios of up to 10:1, covering "via-last" TSV schemes.
Download this datasheet describing how fan-out wafer-level packaging (FOWLP) technology provides higher integration levels and a greater number of external contacts.
DownloadDownload this datasheet describing PVD solutions to deposit Under Bump Metallization (UBM) layers, to enable bump metals to adhere to die electrical pad contacts, or to act as seeds for Cu plated Re-Distribution Layers (RDL).
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